diff options
Diffstat (limited to 'instruction-init.h')
| -rw-r--r-- | instruction-init.h | 176 |
1 files changed, 176 insertions, 0 deletions
diff --git a/instruction-init.h b/instruction-init.h index 4754c2f..aa05d8b 100644 --- a/instruction-init.h +++ b/instruction-init.h @@ -1,80 +1,256 @@ // instruction-init.h // Initializes every instruction function prior to addressing.h so that function addresses are accessible +// also defines the array used to refer to functions + +//InstructionTable +const IT = malloc(256 * (sizeof(uintptr_t) + sizeof(Addressing))); + +void setIT(int i, uintptr_t p, Addressing r){ + uintptr_t* p1 = (IT + (i * sizeof(uintptr_t))); + *p1 = p; + + Addressing* r1 = (IT + ((i * sizeof(Addressing)) + (sizeof(uintptr_t)*256))); + *r1 = r; +} + + +void callIT(int i, address val){ + void (*func)(Addressing, address); + func = (IT + (sizeof(uintptr_t) * i)); + Addressing r = (IT + ((i * sizeof(Addressing)) + (sizeof(uintptr_t)*256))); + func(*r, val); +} + // Load and Store Instructions void fLDA(Addressing, address); + setIT(0xA9, &fLDA, eImmediate); + +// For the sake of testing, only Immediate LDA will be trialled initially to make compiling and solving easier. + +/* IT[0xA5] = {&fLDA, eZeroPage}; + IT[0xB5] = {&fLDA, eZeroPageIndexedX}; + IT[0xAD] = {&fLDA, eAbsolute}; + IT[0xBD] = {&fLDA, eAbsoluteIndexedX}; + IT[0xB9] = {&fLDA, eAbsoluteIndexedY}; + IT[0xA1] = {&fLDA, eIndexedIndirect}; + IT[0xB1] = {&fLDA, eIndirectIndexed}; void fLDX(Addressing, address); + IT[0xA2] = {&fLDX, eImmediate}; + IT[0xA6] = {&fLDX, eZeroPage}; + IT[0xB6] = {&fLDX, eZeroPageIndexedY}; + IT[0xAE] = {&fLDX, eAbsolute}; + IT[0xBE] = {&fLDX, eAbsoluteIndexedY}; void fLDY(Addressing, address); + IT[0xA0] = {&fLDY, eImmediate}; + IT[0xA4] = {&fLDY, eZeroPage}; + IT[0xB4] = {&fLDY, eZeroPageIndexedX}; + IT[0xAC] = {&fLDY, eAbsolute}; + IT[0xBC] = {&fLDY, eAbsoluteIndexedX}; void fSTA(Addressing, address); + IT[0x85] = {&fSTA, eZeroPage}; + IT[0x95] = {&fSTA, eZeroPageIndexedX}; + IT[0x8D] = {&fSTA, eAbsolute}; + IT[0x9D] = {&fSTA, eAbsoluteIndexedX}; + IT[0x99] = {&fSTA, eAbsoluteIndexedY}; + IT[0x81] = {&fSTA, eIndexedIndirect}; + IT[0x91] = {&fSTA, eIndirectIndexed}; void fSTX(Addressing, address); + IT[0x86] = {&fSTX, eZeroPage}; + IT[0x96] = {&fSTX, eZeroPageIndexedX}; + IT[0x8E] = {&fSTX, eAbsolute}; void fSTY(Addressing, address); + IT[0x84] = {&fSTY, eZeroPage}; + IT[0x94] = {&fSTY, eZeroPageIndexedY}; + IT[0x8C] = {&fSTY, eAbsolute}; // Arithmetic Instructions void fADC(Addressing, address); + IT[0x69] = {&fADC, eImmediate}; + IT[0x65] = {&fADC, eZeroPage}; + IT[0x75] = {&fADC, eZeroPageIndexedX}; + IT[0x6D] = {&fADC, eAbsolute}; + IT[0x7D] = {&fADC, eAbsoluteIndexedX}; + IT[0x79] = {&fADC, eAbsoluteIndexedY}; + IT[0x61] = {&fADC, eIndexedIndirect}; + IT[0x71] = {&fADC, eIndirectIndexed}; void fSBC(Addressing, address); + IT[0xE9] = {&fSBC, eImmediate}; + IT[0xE5] = {&fSBC, eZeroPage}; + IT[0xF5] = {&fSBC, eZeroPageIndexedX}; + IT[0xED] = {&fSBC, eAbsolute}; + IT[0xFD] = {&fSBC, eAbsoluteIndexedX}; + IT[0xF9] = {&fSBC, eAbsoluteIndexedY}; + IT[0xE1] = {&fSBC, eIndexedIndirect}; + IT[0xF1] = {&fSBC, eIndirectIndexed}; //Increment and Decrement Instructions void fINC(Addressing, address); + IT[0xE6] = {&fINC, eZeroPage}; + IT[0xF6] = {&fINC, eZeroPageIndexedX}; + IT[0xEE] = {&fINC, eAbsolute}; + IT[0xFE] = {&fINC, eAbsoluteIndexedX}; void fINX(Addressing, address); + IT[0xE8] = {&fINX, eImplied}; void fINY(Addressing, address); + IT[0xC8] = {&fINY, eImplied}; void fDEC(Addressing, address); + IT[0xC6] = {&fDEC, eZeroPage}; + IT[0xD6] = {&fDEC, eZeroPageIndexedX}; + IT[0xCE] = {&fDEC, eAbsolute}; + IT[0xDE] = {&fDEC, eAbsoluteIndexedX}; void fDEX(Addressing, address); + IT[0xCA] = {&fDEX, eImplied}; void fDEY(Addressing, address); + IT[0x88] = {&fDEY, eImplied}; // Logical Instructions void fAND(Addressing, address); + IT[0x29] = {&fAND, eImmediate}; + IT[0x25] = {&fAND, eZeroPage}; + IT[0x35] = {&fAND, eZeroPageIndexedX}; + IT[0x2D] = {&fAND, eAbsolute}; + IT[0x3D] = {&fAND, eAbsoluteIndexedX}; + IT[0x39] = {&fAND, eAbsoluteIndexedY}; + IT[0x21] = {&fAND, eIndexedIndirect}; + IT[0x31] = {&fAND, eIndirectIndexed}; void fORA(Addressing, address); + IT[0x09] = {&fORA, eImmediate}; + IT[0x05] = {&fORA, eZeroPage}; + IT[0x15] = {&fORA, eZeroPageIndexedX}; + IT[0x0D] = {&fORA, eAbsolute}; + IT[0x1D] = {&fORA, eAbsoluteIndexedX}; + IT[0x19] = {&fORA, eAbsoluteIndexedY}; + IT[0x01] = {&fORA, eIndexedIndirect}; + IT[0x11] = {&fORA, eIndirectIndexed}; void fEOR(Addressing, address); + IT[0x49] = {&fEOR, eImmediate}; + IT[0x45] = {&fEOR, eZeroPage}; + IT[0x55] = {&fEOR, eZeroPageIndexedX}; + IT[0x4D] = {&fEOR, eAbsolute}; + IT[0x5D] = {&fEOR, eAbsoluteIndexedX}; + IT[0x59] = {&fEOR, eAbsoluteIndexedY}; + IT[0x41] = {&fEOR, eIndexedIndirect}; + IT[0x51] = {&fEOR, eIndirectIndexed}; // Jump, Branch, Compare, and Test Bits void fJMP(Addressing, address); + IT[0x4C] = {&fJMP, eAbsolute}; + IT[0x6C] = {&fJMP, eIndirectAbsolute}; void fBCC(Addressing, address); + IT[0x90] = {&fBCC, eRelative}; void fBCS(Addressing, address); + IT[0xB0] = {&fBCS, eRelative}; void fBEQ(Addressing, address); + IT[0xF0] = {&fBEQ, eRelative}; void fBNE(Addressing, address); + IT[0xD0] = {&fBNE, eRelative}; void fBMI(Addressing, address); + IT[0x30] = {&fBMI, eRelative}; void fBPL(Addressing, address); + IT[0x10] = {&fBPL, eRelative}; void fBVS(Addressing, address); + IT[0x70] = {&fBVS, eRelative}; void fBVC(Addressing, address); + IT[0x50] = {&fBVC, eRelative}; void fCMP(Addressing, address); + IT[0xC9] = {&fCMP, eImmediate}; + IT[0xC5] = {&fCMP, eZeroPage}; + IT[0xD5] = {&fCMP, eZeroPageIndexedX}; + IT[0xCD] = {&fCMP, eAbsolute}; + IT[0xDD] = {&fCMP, eAbsoluteIndexedX}; + IT[0xD9] = {&fCMP, eAbsoluteIndexedY}; + IT[0xC1] = {&fCMP, eIndexedIndirect}; + IT[0xD1] = {&fCMP, eIndirectIndexed}; void fCPX(Addressing, address); + IT[0xE0] = {&fCPX, eImmediate}; + IT[0xE4] = {&fCPX, eZeroPage}; + IT[0xEC] = {&fCPX, eAbsolute}; void fCPY(Addressing, address); + IT[0xC0] = {&fCPY, eImmediate}; + IT[0xC4] = {&fCPY, eZeroPage}; + IT[0xCC] = {&fCPY, eAbsolute}; void fBIT(Addressing, address); + IT[0x4C] = {&fBIT, eZeroPage}; + IT[0x6C] = {&fBIT, eAbsolute}; // Shift and Rotate Instructions void fASL(Addressing, address); + IT[0x0A] = {&fASL, eAccumulator}; + IT[0x06] = {&fASL, eZeroPage}; + IT[0x16] = {&fASL, eZeroPageIndexedX}; + IT[0x0E] = {&fASL, eAbsolute}; + IT[0x1E] = {&fASL, eAbsoluteIndexedX}; void fLSR(Addressing, address); + IT[0x4A] = {&fLSR, eAccumulator}; + IT[0x46] = {&fLSR, eZeroPage}; + IT[0x56] = {&fLSR, eZeroPageIndexedX}; + IT[0x4E] = {&fLSR, eAbsolute}; + IT[0x5E] = {&fLSR, eAbsoluteIndexedX}; void fROL(Addressing, address); + IT[0x2A] = {&fROL, eAccumulator}; + IT[0x26] = {&fROL, eZeroPage}; + IT[0x36] = {&fROL, eZeroPageIndexedX}; + IT[0x2E] = {&fROL, eAbsolute}; + IT[0x3E] = {&fROL, eAbsoluteIndexedX}; void fROR(Addressing, address); + IT[0x6A] = {&fROR, eAccumulator}; + IT[0x66] = {&fROR, eZeroPage}; + IT[0x76] = {&fROR, eZeroPageIndexedX}; + IT[0x6E] = {&fROR, eAbsolute}; + IT[0x7E] = {&fROR, eAbsoluteIndexedX}; // Transfer Instructions void fTAX(Addressing, address); + IT[0xAA] = {&fTAX, eImplied}; void fTAY(Addressing, address); + IT[0xA8] = {&fTAY, eImplied}; void fTXA(Addressing, address); + IT[0x8A] = {&fTXA, eImplied}; void fTYA(Addressing, address); + IT[0x98] = {&fTYA, eImplied}; // Stack Instructions void fTSX(Addressing, address); + IT[0xBA] = {&fTSX, eImplied}; void fTXS(Addressing, address); + IT[0x9A] = {&fTXS, eImplied}; void fPHA(Addressing, address); + IT[0x48] = {&fPHA, eImplied}; void fPHP(Addressing, address); + IT[0x08] = {&fPHP, eImplied}; void fPLA(Addressing, address); + IT[0x68] = {&fPLA, eImplied}; void fPLP(Addressing, address); + IT[0x28] = {&fPLP, eImplied}; // Subroutine Instructions void fJSR(Addressing, address); + IT[0x20] = {&fJSR, eAbsolute}; void fRTS(Addressing, address); + IT[0x60] = {&fRTS, eImplied}; void fRTI(Addressing, address); + IT[0x40] = {&fRTI, eImplied}; // Set/Reset Insutrctions void fCLC(Addressing, address); + IT[0x18] = {&fCLC, eImplied}; void fCLD(Addressing, address); + IT[0xD8] = {&fCLD, eImplied}; void fCLI(Addressing, address); + IT[0x58] = {&fCLI, eImplied}; void fCLV(Addressing, address); + IT[0xB8] = {&fCLV, eImplied}; void fSEC(Addressing, address); + IT[0x38] = {&fSEC, eImplied}; void fSED(Addressing, address); + IT[0xF8] = {&fSED, eImplied}; void fSEI(Addressing, address); + IT[0x78] = {&fSEI, eImplied}; // NOP/BRK Instructions void fNOP(Addressing, address); + IT[0xEA] = {&fNOP, eImplied}; void fBRK(Addressing, address); + IT[0x00] = {&fBRK, eImplied}; +*/
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