From a4a9590148fdae2f656b25dd1d7b442969726c28 Mon Sep 17 00:00:00 2001 From: alekseiplusplus Date: Mon, 10 Apr 2023 20:46:43 +1000 Subject: Changed pointer switch case to if else for now --- addressing.h | 172 +++++++++++++++++++++++++++++++---------------------- applesystem.h | 4 +- debug.h | 24 +++++++- include.h | 4 +- instruction-init.h | 112 +++++++++++++++++----------------- instruction.h | 22 +++---- interpreter.c | 54 ++++++++--------- 7 files changed, 222 insertions(+), 170 deletions(-) diff --git a/addressing.h b/addressing.h index 9c57592..1bfc61e 100644 --- a/addressing.h +++ b/addressing.h @@ -19,9 +19,6 @@ enum Addressing { typedef int Addressing; -//Holds address of current instruction. -void (*current_instruction)(Addressing, address); - struct AddData{ int cycles; int length; @@ -29,6 +26,18 @@ struct AddData{ byte value; }; +typedef struct AddData AddData; + + + +#include"instruction-init.h" + + +//Holds address of current instruction. +void (*current_instruction)(Addressing, address); + + + AddData fAddress(Addressing addr, short x) { AddData ret; @@ -85,7 +94,7 @@ AddData fAddress(Addressing addr, short x) { break; default: - ret.value = Memory[ret.add] + ret.value = Memory[ret.add]; } @@ -102,83 +111,104 @@ AddData fAddress(Addressing addr, short x) { // CYCLES - switch(current_function){ // Initial value - case &fADC: case &fAND: case &fBIT: case &fCMP: case &fCPX: case &fCPY: case &fEOR: case &fLDA: - case &fLDX: case &fLDY: case &fORA: case &fSBC: case &fSTX: case &fSTY: - switch(addr){ - case eImmediate: - ret.cycles = 2; break; - case eZeroPage: - ret.cycles = 3; break; - case eZeroPageIndexedX: case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: - ret.cycles = 4; break; - case eIndexedIndirect: - ret.cycles = 6; break; - case eIndirectIndexed: - ret.cycles = 5; break; - } - break; + //case &fADC: case &fAND: case &fBIT: case &fCMP: case &fCPX: case &fCPY: case &fEOR: case &fLDA: + //case &fLDX: case &fLDY: case &fORA: case &fSBC: case &fSTX: case &fSTY: + + if ( current_instruction == &fADC || current_instruction == &fAND || current_instruction == &fBIT || current_instruction == &fCMP || current_instruction == &fCPX + || current_instruction == &fCPY || current_instruction == &fEOR || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY + || current_instruction == &fORA || current_instruction == &fSBC || current_instruction == &fSTX || current_instruction == &fSTY ){ + switch(addr){ + case eImmediate: + ret.cycles = 2; break; + case eZeroPage: + ret.cycles = 3; break; + case eZeroPageIndexedX: case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: + ret.cycles = 4; break; + case eIndexedIndirect: + ret.cycles = 6; break; + case eIndirectIndexed: + ret.cycles = 5; break; + } + } + + //case &fASL: case &fDEC: case &fINC: case &fLSR: case &fROL: case &fROR: + else if (current_instruction == &fASL || current_instruction == &fDEC || current_instruction == &fINC + || current_instruction == &fLSR || current_instruction == &fROL || current_instruction == &fROR ){ + switch(addr){ + case eAccumulator: + ret.cycles = 2; break; + case eZeroPage: + ret.cycles = 5; break; + case eZeroPageIndexedX: case eAbsolute: + ret.cycles = 6; break; + case eAbsoluteIndexedX: + ret.cycles = 7; break; + } + } - case &fASL: case &fDEC: case &fINC: case &fLSR: case &fROL: case &fROR: - switch(addr){ - case eAccumulator: - ret.cycles = 2; break; - case eZeroPage: - ret.cycles = 5; break; - case eZeroPageIndexedX: case eAbsolute: - ret.cycles = 6; break; - case eAbsoluteIndexedX: - ret.cycles = 7; break; - } - break; + //case &fSTA: + else if (current_instruction == &fSTA){ + switch(addr){ + case eZeroPage: + ret.cycles = 3; break; + case eZeroPageIndexedX: case eAbsolute: + ret.cycles = 4; break; + case eAbsoluteIndexedX: case eAbsoluteIndexedY: + ret.cycles = 5; break; + case eIndexedIndirect: case eIndirectIndexed: + ret.cycles = 6; break; + } + } - case &fSTA: - switch(addr){ - case eZeroPage: - ret.cycles = 3; break; - case eZeroPageIndexedX: case eAbsolute: - ret.cycles = 4; break; - case eAbsoluteIndexedX: case eAbsoluteIndexedY: - ret.cycles = 5; break; - case eIndexedIndirect: case eIndirectIndexed: - ret.cycles = 6; break; - } - break; - case &fBRK: - ret.cycles = 7; - break; + //case &fBRK: + else if (current_instruction == &fBRK){ + ret.cycles = 7; + } - case &RTI: case &RTS: case &JSR: - ret.cycles = 6; - break; - case &fJMP: - ret.cycles = 5; - break; + //case &fRTI: case &fRTS: case &fJSR: + else if (current_instruction == &fRTI || current_instruction == &fRTS || current_instruction == &fJSR){ + ret.cycles = 6; + } - case &fPLA: case &fPLP: - ret.cycles = 4; - break; + //case &fJMP: + else if (current_instruction == &fJMP){ + ret.cycles = 5; + } - case &fPHA: case &fPHP: - ret.cycles = 3; - break; + //case &fPLA: case &fPLP: + else if (current_instruction == &fPLA || current_instruction == &fPLP){ + ret.cycles = 4; + } - default: - ret.cycles = 2; + //case &fPHA: case &fPHP: + else if (current_instruction == &fPHA || current_instruction == &fPHP){ + ret.cycles = 3; } - switch(current_function){ // Page Boundary - case &fADC: case &fSBC: case &fLDA: case &fLDX: case &fLDY: case &fEOR: case &fAND: case &fORA: case &fCMP: - switch(addr){ - case eAbsoluteIndexedX: - if ((x & 0xFFFC) != ((x + X) & 0xFFFC)) ret.cycles++; break; - case eAbsoluteIndexedY: - if ((x & 0xFFFC) != ((x + Y) & 0xFFFC)) ret.cycles++; break; - case eIndirectIndexed: - if ((ret.add & 0xFFFC) != (ret.add - Y & 0xFFFC)) ret.cycles++; break; - } + else { + ret.cycles = 2; } + + + // Page Boundary + + + + + //case &fADC: case &fSBC: case &fLDA: case &fLDX: case &fLDY: case &fEOR: case &fAND: case &fORA: case &fCMP: + if ( current_instruction == &fADC || current_instruction == &fSBC || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY + || current_instruction == &fEOR || current_instruction == &fAND || current_instruction == &fORA || current_instruction == &fCMP ){ + switch(addr){ + case eAbsoluteIndexedX: + if ((x & 0xFFFC) != ((x + X) & 0xFFFC)) ret.cycles++; break; + case eAbsoluteIndexedY: + if ((x & 0xFFFC) != ((x + Y) & 0xFFFC)) ret.cycles++; break; + case eIndirectIndexed: + if ((ret.add & 0xFFFC) != (ret.add - Y & 0xFFFC)) ret.cycles++; break; + } + } + } diff --git a/applesystem.h b/applesystem.h index 4cff655..6b2f818 100644 --- a/applesystem.h +++ b/applesystem.h @@ -5,7 +5,7 @@ typedef unsigned char byte; typedef unsigned short address; byte acc, X, Y, P, S = 0x00; address PC = 0x0000; -register byte Memory[4096]; // TO DO. Add expansion capability to memory. +byte Memory[4096]; // TO DO. Add expansion capability to memory. // FLAGS const byte flag_N = 0x80; // Negative @@ -36,7 +36,7 @@ void flagSet(byte flag){ } void flagClear(byte flag){ - P &= ~flag + P &= ~flag; } diff --git a/debug.h b/debug.h index c46f220..887fcbc 100644 --- a/debug.h +++ b/debug.h @@ -1,11 +1,31 @@ // debug.h // Various functions useful for use during development. -void dPageDump(){ +// Converts a single character to hexadecimal +int dChar2Num (char c) { + // 0x0 - 0x9 + if (c != 0x20 && (c >= 0x30 && c <= 0x39)){ + return (c - 0x30); + } + // 0xA - 0xF + else if (c != 0x20 && (c >= 0x41 && c <= 0x46)){ + return (c - 0x37); + // 0xa - 0xf + }else if (c != 0x20 && (c >= 0x61 && c <= 0x66)){ + return (c - 0x57); + // Invalid + }else{ + return -1; + } +} + +// Dump a particular page in memory. +void dPageDump(short m){ + m *= 0x0100; for(int i = 0; i < 256; i+=16){ printf("\t"); for(int j = 0; j < 16; j+=1){ - printf("%2x ", Memory[(i+j)]); + printf("%2x ", Memory[(m+(i+j))]); } printf("\n"); } diff --git a/include.h b/include.h index e4c3ee2..1a52156 100644 --- a/include.h +++ b/include.h @@ -1,6 +1,8 @@ #include"stdio.h" +#include"stdint.h" + #include"applesystem.h" -#include"instruction-init.h" + #include"addressing.h" #include"instruction.h" diff --git a/instruction-init.h b/instruction-init.h index 4a82d8a..4754c2f 100644 --- a/instruction-init.h +++ b/instruction-init.h @@ -2,79 +2,79 @@ // Initializes every instruction function prior to addressing.h so that function addresses are accessible // Load and Store Instructions -void fLDA(Addressing addr, address val); -void fLDX(Addressing addr, address val); -void fLDY(Addressing addr, address val); -void fSTA(Addressing addr, address val); -void fSTX(Addressing addr, address val); -void fSTY(Addressing addr, address val); +void fLDA(Addressing, address); +void fLDX(Addressing, address); +void fLDY(Addressing, address); +void fSTA(Addressing, address); +void fSTX(Addressing, address); +void fSTY(Addressing, address); // Arithmetic Instructions -void fADC(Addressing addr, address val); -void fSBC(Addressing addr, address val); +void fADC(Addressing, address); +void fSBC(Addressing, address); //Increment and Decrement Instructions -void fINC(Addressing addr, address val); -void fINX(Addressing addr, address val); -void fINY(Addressing addr, address val); -void fDEC(Addressing addr, address val); -void fDEX(Addressing addr, address val); -void fDEY(Addressing addr, address val); +void fINC(Addressing, address); +void fINX(Addressing, address); +void fINY(Addressing, address); +void fDEC(Addressing, address); +void fDEX(Addressing, address); +void fDEY(Addressing, address); // Logical Instructions -void fAND(Addressing addr, address val) -void fORA(Addressing addr, address val); -void fEOR(Addressing addr, address val); +void fAND(Addressing, address); +void fORA(Addressing, address); +void fEOR(Addressing, address); // Jump, Branch, Compare, and Test Bits -void fJMP(Addressing addr, address val); -void fBCC(Addressing addr, address val); -void fBCS(Addressing addr, address val); -void fBEQ(Addressing addr, address val); -void fBNE(Addressing addr, address val); -void fBMI(Addressing addr, address val); -void fBPL(Addressing addr, address val); -void fBVS(Addressing addr, address val); -void fBVC(Addressing addr, address val); -void fCMP(Addressing addr, address val); -void fCPX(Addressing addr, address val); -void fCPY(Addressing addr, address val); -void fBIT(Addressing addr, address val); +void fJMP(Addressing, address); +void fBCC(Addressing, address); +void fBCS(Addressing, address); +void fBEQ(Addressing, address); +void fBNE(Addressing, address); +void fBMI(Addressing, address); +void fBPL(Addressing, address); +void fBVS(Addressing, address); +void fBVC(Addressing, address); +void fCMP(Addressing, address); +void fCPX(Addressing, address); +void fCPY(Addressing, address); +void fBIT(Addressing, address); // Shift and Rotate Instructions -void fASL(Addressing addr, address val); -void fLSR(Addressing addr, address val); -void fROL(Addressing addr, address val); -void fROR(Addressing addr, address val); +void fASL(Addressing, address); +void fLSR(Addressing, address); +void fROL(Addressing, address); +void fROR(Addressing, address); // Transfer Instructions -void fTAX(Addressing addr, address val); -void fTAY(Addressing addr, address val); -void fTXA(Addressing addr, address val); -void fTYA(Addressing addr, address val); +void fTAX(Addressing, address); +void fTAY(Addressing, address); +void fTXA(Addressing, address); +void fTYA(Addressing, address); // Stack Instructions -void fTSX(Addressing addr, address val); -void fTXS(Addressing addr, address val); -void fPHA(Addressing addr, address val); -void fPHP(Addressing addr, address val); -void fPLA(Addressing addr, address val); -void fPLP(Addressing addr, address val); +void fTSX(Addressing, address); +void fTXS(Addressing, address); +void fPHA(Addressing, address); +void fPHP(Addressing, address); +void fPLA(Addressing, address); +void fPLP(Addressing, address); // Subroutine Instructions -void fJSR(Addressing addr, address val); -void fRTS(Addressing addr, address val); -void fRTI(Addressing addr, address val); +void fJSR(Addressing, address); +void fRTS(Addressing, address); +void fRTI(Addressing, address); // Set/Reset Insutrctions -void fCLC(Addressing addr, address val); -void fCLD(Addressing addr, address val); -void fCLI(Addressing addr, address val); -void fCLV(Addressing addr, address val); -void fSEC(Addressing addr, address val); -void fSED(Addressing addr, address val); -void fSEI(Addressing addr, address val); +void fCLC(Addressing, address); +void fCLD(Addressing, address); +void fCLI(Addressing, address); +void fCLV(Addressing, address); +void fSEC(Addressing, address); +void fSED(Addressing, address); +void fSEI(Addressing, address); // NOP/BRK Instructions -void fNOP(Addressing addr, address val); -void fBRK(Addressing addr, address val); +void fNOP(Addressing, address); +void fBRK(Addressing, address); diff --git a/instruction.h b/instruction.h index e8e9bbc..96f5719 100644 --- a/instruction.h +++ b/instruction.h @@ -7,7 +7,7 @@ //Instruction Data -AddData idata; +AddData idata; // Load and Store Instructions @@ -81,25 +81,25 @@ void fINX(Addressing addr, address val){ idata = fAddress(addr, val); void fINY(Addressing addr, address val){ idata = fAddress(addr, val); Y++; - setFlagD(Y); + setFlagN(Y); setFlagZ(Y); } void fDEC(Addressing addr, address val){ idata = fAddress(addr, val); Memory[idata.add]--; - setFlagD(Memory[idata.add]); + setFlagN(Memory[idata.add]); setFlagZ(Memory[idata.add]); } void fDEX(Addressing addr, address val){ idata = fAddress(addr, val); X--; - setFlagD(X); + setFlagN(X); setFlagZ(X); } void fDEY(Addressing addr, address val){ idata = fAddress(addr, val); Y--; - setFlagD(Y); + setFlagN(Y); setFlagZ(Y); } @@ -272,7 +272,7 @@ void fTXS(Addressing addr, address val){ idata = fAddress(addr, val); } void fPHA(Addressing addr, address val){ idata = fAddress(addr, val); - Memory[0x01FF-S] = A; + Memory[0x01FF-S] = acc; S++; } @@ -283,7 +283,7 @@ void fPHP(Addressing addr, address val){ idata = fAddress(addr, val); void fPLA(Addressing addr, address val){ idata = fAddress(addr, val); S--; - A = Memory[0x01FF-S]; + acc = Memory[0x01FF-S]; } void fPLP(Addressing addr, address val){ idata = fAddress(addr, val); @@ -293,17 +293,17 @@ void fPLP(Addressing addr, address val){ idata = fAddress(addr, val); // Subroutine Instructions -void fJSR(Addressing addr, address val){ idata = fAddress(addr, val) +void fJSR(Addressing addr, address val){ idata = fAddress(addr, val); Memory[0x01FF-S] = (idata.add-1); S++; - PC = idata.add + PC = idata.add; } -void fRTS(Addressing addr, address val){ idata = fAddress(addr, val) +void fRTS(Addressing addr, address val){ idata = fAddress(addr, val); } -void fRTI(Addressing addr, address val){ idata = fAddress(addr, val) +void fRTI(Addressing addr, address val){ idata = fAddress(addr, val); } diff --git a/interpreter.c b/interpreter.c index 82cb9b2..ee30258 100644 --- a/interpreter.c +++ b/interpreter.c @@ -10,41 +10,40 @@ */ #include"include.h" - -int charToNum (char c, int mul) { - if (c != 0x20 && (c >= 0x30 && c <= 0x39)){ - a = (mul * (c - 0x30)); - }else if (c != 0x20 && (c >= 0x41 && c <= 0x46)){ - a = (mul * (c - 0x31)); - } -} - - +#include"debug.h" int main(){ char c; unsigned char a, b; - while(true){ - // Pass 1 + while(1){ c = getchar(); - if (c == EOF) break; - switch(c){ - case D: case d: - debug_print(); - break; - case M: case m: - int m = 0; - for(int i = 1; i <= 1000; i *= 10){ - m += charToNum(getchar(), 1000/i); - } - printf("Address %d has %x", m, Memory[m]); - break; + + // Exit condition + if ( (c == 'X') || (c == 'x') ) break; + + if (dChar2Num(c) == -1){ + // Debug print conditions + switch(c){ + case 'P': case 'p': // Print debug information + debug_print(); + break; + case 'M': case 'm': // Dump memory page + dChar2Num(getchar()); + printf("Address %d has %x", m, Memory[m]); + break; + case ' ': + break; + } + }else{ + // Run Instruction + } - a += charToNum(c, 0x10); + + a += dChar2Num(c, 0x10); // Pass 2 c = getchar(); if (c == EOF) break; - a += charToNum(c, 0x01); + a += dChar2Num(c, 0x01); //Check for next value c = getchar(); if (!(c == EOF || c == ' ')) { @@ -57,7 +56,8 @@ int main(){ c = getchar(); if (c == EOF) break; b += charToNum(c, 0x0001); } - runInstruction(a, b); + //runInstruction(a, b); c = getchar(); if (c == EOF) break; } + return 0; } \ No newline at end of file -- cgit v1.2.3