From db83125332af3622d5dfec5d73a93b7593898d5b Mon Sep 17 00:00:00 2001 From: alekseiplusplus Date: Sun, 13 Aug 2023 12:21:31 +1000 Subject: Added functions to addressing --- src/cpu/addressing.c | 152 ++++++++++++++++++++++++--------------------------- src/cpu/addressing.h | 7 ++- 2 files changed, 77 insertions(+), 82 deletions(-) diff --git a/src/cpu/addressing.c b/src/cpu/addressing.c index 9a1694d..97ebb00 100644 --- a/src/cpu/addressing.c +++ b/src/cpu/addressing.c @@ -4,84 +4,61 @@ #include"addressing.h" -int fAddressGetLength(Addressing addr){ - switch(addr){ - case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: - return 3; - case eAccumulator: case eImplied: - return 1; - default: - return 2; - } -} - -AddData fAddress(Addressing addr, short x) { - AddData ret; - - // ADDRESS - - switch(addr){ +address fAddressGetAddress(Addressing mode, short x) { + switch(mode){ case eImplied: case eIndirectAbsolute: case eRelative: case eImmediate: case eAccumulator: - ret.add = 0x0000; - break; - + return 0x0000; case eAbsolute: - ret.add = x; - break; + return x; case eAbsoluteIndexedX: - ret.add = (x + X); - break; + return x + X; case eAbsoluteIndexedY: - ret.add = (x + Y); - break; - + return x + Y; case eZeroPage: - ret.add = (x & 0x00FF); - break; + return x & 0x00FF; case eZeroPageIndexedX: - ret.add = ((x + X) & 0x00FF); - break; + return ((x + X) & 0x00FF); case eZeroPageIndexedY: - ret.add = ((x + Y) & 0x00FF); - break; - + return ((x + Y) & 0x00FF); case eIndexedIndirect: - ret.add = ((getMemory(x+X+1))<<8) + (getMemory(x+X)); - break; + return ((getMemory(x+X+1))<<8) + (getMemory(x+X)); case eIndirectIndexed: - ret.add = ((getMemory(x+1))<<8) + (getMemory(x)) + Y; - break; + return ((getMemory(x+1))<<8) + (getMemory(x)) + Y; } +} - // VALUE +int fAddressGetLength(Addressing mode){ + switch(mode){ + case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: + return 3; + case eAccumulator: case eImplied: + return 1; + default: + return 2; + } +} - switch(addr){ +byte fAddressGetValue(Addressing mode, short x, address addr) { + switch(mode){ case eImplied: case eIndirectAbsolute: case eRelative: - break; - + return 0; case eImmediate: - ret.value = x; - break; - + return x; case eAccumulator: - ret.value = acc; - break; - + return acc; default: - ret.value = getMemory(ret.add); + return getMemory(addr); } +} - // LENGTH - - ret.length = fAddressGetLength(addr); - - // CYCLES +int fAddressGetCycles(Addressing mode, short x, address addr) { + int cycles; //case &fADC: case &fAND: case &fBIT: case &fCMP: case &fCPX: case &fCPY: case &fEOR: case &fLDA: //case &fLDX: case &fLDY: case &fORA: case &fSBC: case &fSTX: case &fSTY: @@ -89,78 +66,78 @@ AddData fAddress(Addressing addr, short x) { if ( current_instruction == &fADC || current_instruction == &fAND || current_instruction == &fBIT || current_instruction == &fCMP || current_instruction == &fCPX || current_instruction == &fCPY || current_instruction == &fEOR || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY || current_instruction == &fORA || current_instruction == &fSBC || current_instruction == &fSTX || current_instruction == &fSTY ){ - switch(addr){ + switch(mode){ case eImmediate: - ret.cycles = 2; break; + cycles = 2; break; case eZeroPage: - ret.cycles = 3; break; + cycles = 3; break; case eZeroPageIndexedX: case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: - ret.cycles = 4; break; + cycles = 4; break; case eIndexedIndirect: - ret.cycles = 6; break; + cycles = 6; break; case eIndirectIndexed: - ret.cycles = 5; break; + cycles = 5; break; } } //case &fASL: case &fDEC: case &fINC: case &fLSR: case &fROL: case &fROR: else if( current_instruction == &fASL || current_instruction == &fDEC || current_instruction == &fINC || current_instruction == &fLSR || current_instruction == &fROL || current_instruction == &fROR ){ - switch(addr){ + switch(mode){ case eAccumulator: - ret.cycles = 2; break; + cycles = 2; break; case eZeroPage: - ret.cycles = 5; break; + cycles = 5; break; case eZeroPageIndexedX: case eAbsolute: - ret.cycles = 6; break; + cycles = 6; break; case eAbsoluteIndexedX: - ret.cycles = 7; break; + cycles = 7; break; } } //case &fSTA: else if (current_instruction == &fSTA){ - switch(addr){ + switch(mode){ case eZeroPage: - ret.cycles = 3; break; + cycles = 3; break; case eZeroPageIndexedX: case eAbsolute: - ret.cycles = 4; break; + cycles = 4; break; case eAbsoluteIndexedX: case eAbsoluteIndexedY: - ret.cycles = 5; break; + cycles = 5; break; case eIndexedIndirect: case eIndirectIndexed: - ret.cycles = 6; break; + cycles = 6; break; } } //case &fBRK: else if (current_instruction == &fBRK){ - ret.cycles = 7; + cycles = 7; } //case &fRTI: case &fRTS: case &fJSR: else if (current_instruction == &fRTI || current_instruction == &fRTS || current_instruction == &fJSR){ - ret.cycles = 6; + cycles = 6; } //case &fJMP: else if (current_instruction == &fJMP){ - ret.cycles = 5; + cycles = 5; } //case &fPLA: case &fPLP: else if (current_instruction == &fPLA || current_instruction == &fPLP){ - ret.cycles = 4; + cycles = 4; } //case &fPHA: case &fPHP: else if (current_instruction == &fPHA || current_instruction == &fPHP){ - ret.cycles = 3; + cycles = 3; } else { - ret.cycles = 2; + cycles = 2; } @@ -169,15 +146,30 @@ AddData fAddress(Addressing addr, short x) { //case &fADC: case &fSBC: case &fLDA: case &fLDX: case &fLDY: case &fEOR: case &fAND: case &fORA: case &fCMP: if ( current_instruction == &fADC || current_instruction == &fSBC || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY || current_instruction == &fEOR || current_instruction == &fAND || current_instruction == &fORA || current_instruction == &fCMP ){ - switch(addr){ + switch(mode){ case eAbsoluteIndexedX: - if ((x & 0xFF00) != ((x + X) & 0xFF00)) ret.cycles++; break; + if ((x & 0xFF00) != ((x + X) & 0xFF00)) + cycles++; + break; case eAbsoluteIndexedY: - if ((x & 0xFF00) != ((x + Y) & 0xFF00)) ret.cycles++; break; + if ((x & 0xFF00) != ((x + Y) & 0xFF00)) + cycles++; + break; case eIndirectIndexed: - if ((ret.add & 0xFF00) != (ret.add - Y & 0xFF00)) ret.cycles++; break; + if ((addr & 0xFF00) != (addr - Y & 0xFF00)) + cycles++; + break; } } + return cycles; +} + +AddData fAddress(Addressing mode, short x) { + AddData ret; + ret.add = fAddressGetAddress (mode, x); + ret.value = fAddressGetValue (mode, x, ret.add); + ret.length = fAddressGetLength (mode, x); + ret.cycles = fAddressGetCycles (mode, x, ret.add); return ret; } \ No newline at end of file diff --git a/src/cpu/addressing.h b/src/cpu/addressing.h index c520535..2c9c63a 100644 --- a/src/cpu/addressing.h +++ b/src/cpu/addressing.h @@ -13,8 +13,11 @@ void* current_instruction; #define getInstructionLength(c) fAddressGetLength(*getInstructionTableAddressing(c)) -int fAddressGetLength(Addressing addr); -AddData fAddress(Addressing addr, short x); +address fAddressGetAddress (Addressing mode, short x ); +int fAddressGetLength (Addressing mode ); +byte fAddressGetValue (Addressing mode, short x, address addr); +int fAddressGetCycles (Addressing mode, short x, address addr); +AddData fAddress (Addressing mode, short x); #endif \ No newline at end of file -- cgit v1.2.3