diff options
Diffstat (limited to 'src/cpu/addressing.c')
| -rw-r--r-- | src/cpu/addressing.c | 184 |
1 files changed, 184 insertions, 0 deletions
diff --git a/src/cpu/addressing.c b/src/cpu/addressing.c new file mode 100644 index 0000000..6e7d950 --- /dev/null +++ b/src/cpu/addressing.c @@ -0,0 +1,184 @@ +// addressing.h +// Contains definitions relevant to addressing, as well as fAddress() which returns time, length, value, and address for an instruction function call. + +#include"addressing.h" + +#define getInstructionLength(c) fAddressGetLength(*getInstructionTableAddressing(c)) + +int fAddressGetLength(Addressing addr){ + switch(addr){ + case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: + return 3; + case eAccumulator: case eImplied: + return 1; + default: + return 2; + } +} + +AddData fAddress(Addressing addr, short x) { + AddData ret; + + // ADDRESS + + switch(addr){ + case eImplied: + case eIndirectAbsolute: + case eRelative: + case eImmediate: + case eAccumulator: + ret.add = 0x0000; + break; + + case eAbsolute: + ret.add = x; + break; + case eAbsoluteIndexedX: + ret.add = (x + X); + break; + case eAbsoluteIndexedY: + ret.add = (x + Y); + break; + + case eZeroPage: + ret.add = (x & 0x00FF); + break; + case eZeroPageIndexedX: + ret.add = ((x + X) & 0x00FF); + break; + case eZeroPageIndexedY: + ret.add = ((x + Y) & 0x00FF); + break; + + case eIndexedIndirect: + ret.add = ((getMemory(x+X+1))<<8) + (getMemory(x+X)); + break; + case eIndirectIndexed: + ret.add = ((getMemory(x+1))<<8) + (getMemory(x)) + Y; + break; + } + + // VALUE + + switch(addr){ + case eImplied: + case eIndirectAbsolute: + case eRelative: + break; + + case eImmediate: + ret.value = x; + break; + + case eAccumulator: + ret.value = acc; + break; + + default: + ret.value = getMemory(ret.add); + } + + // LENGTH + + ret.length = fAddressGetLength(addr); + + // CYCLES + + //case &fADC: case &fAND: case &fBIT: case &fCMP: case &fCPX: case &fCPY: case &fEOR: case &fLDA: + //case &fLDX: case &fLDY: case &fORA: case &fSBC: case &fSTX: case &fSTY: + + if ( current_instruction == &fADC || current_instruction == &fAND || current_instruction == &fBIT || current_instruction == &fCMP || current_instruction == &fCPX + || current_instruction == &fCPY || current_instruction == &fEOR || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY + || current_instruction == &fORA || current_instruction == &fSBC || current_instruction == &fSTX || current_instruction == &fSTY ){ + switch(addr){ + case eImmediate: + ret.cycles = 2; break; + case eZeroPage: + ret.cycles = 3; break; + case eZeroPageIndexedX: case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: + ret.cycles = 4; break; + case eIndexedIndirect: + ret.cycles = 6; break; + case eIndirectIndexed: + ret.cycles = 5; break; + } + } + + //case &fASL: case &fDEC: case &fINC: case &fLSR: case &fROL: case &fROR: + else if( current_instruction == &fASL || current_instruction == &fDEC || current_instruction == &fINC + || current_instruction == &fLSR || current_instruction == &fROL || current_instruction == &fROR ){ + switch(addr){ + case eAccumulator: + ret.cycles = 2; break; + case eZeroPage: + ret.cycles = 5; break; + case eZeroPageIndexedX: case eAbsolute: + ret.cycles = 6; break; + case eAbsoluteIndexedX: + ret.cycles = 7; break; + } + } + + //case &fSTA: + else if (current_instruction == &fSTA){ + switch(addr){ + case eZeroPage: + ret.cycles = 3; break; + case eZeroPageIndexedX: case eAbsolute: + ret.cycles = 4; break; + case eAbsoluteIndexedX: case eAbsoluteIndexedY: + ret.cycles = 5; break; + case eIndexedIndirect: case eIndirectIndexed: + ret.cycles = 6; break; + } + } + + + //case &fBRK: + else if (current_instruction == &fBRK){ + ret.cycles = 7; + } + + + //case &fRTI: case &fRTS: case &fJSR: + else if (current_instruction == &fRTI || current_instruction == &fRTS || current_instruction == &fJSR){ + ret.cycles = 6; + } + + //case &fJMP: + else if (current_instruction == &fJMP){ + ret.cycles = 5; + } + + //case &fPLA: case &fPLP: + else if (current_instruction == &fPLA || current_instruction == &fPLP){ + ret.cycles = 4; + } + + //case &fPHA: case &fPHP: + else if (current_instruction == &fPHA || current_instruction == &fPHP){ + ret.cycles = 3; + } + + else { + ret.cycles = 2; + } + + + // Page Boundary + + //case &fADC: case &fSBC: case &fLDA: case &fLDX: case &fLDY: case &fEOR: case &fAND: case &fORA: case &fCMP: + if ( current_instruction == &fADC || current_instruction == &fSBC || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY + || current_instruction == &fEOR || current_instruction == &fAND || current_instruction == &fORA || current_instruction == &fCMP ){ + switch(addr){ + case eAbsoluteIndexedX: + if ((x & 0xFF00) != ((x + X) & 0xFF00)) ret.cycles++; break; + case eAbsoluteIndexedY: + if ((x & 0xFF00) != ((x + Y) & 0xFF00)) ret.cycles++; break; + case eIndirectIndexed: + if ((ret.add & 0xFF00) != (ret.add - Y & 0xFF00)) ret.cycles++; break; + } + } + + return ret; +}
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