summaryrefslogtreecommitdiff
path: root/src/cpu/addressing.c
blob: 60ec4f0e86297478b4cf43e8474b3523332b4fc1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
//	addressing.h
//	Contains definitions relevant to addressing, as well as fAddress() which returns time, length, value, and address for an instruction function call.
// Would like to refactor the code into something better, such as switch-case statements for the cycles calculation.

#include"addressing.h"


//Holds address of current instruction.
void* current_instruction;

address fAddressGetAddress(Addressing mode, address x) {
	switch(mode){
		case eImplied:
		case eRelative:
		case eImmediate:
		case eAccumulator:
			return 0x0000;
		case eAbsolute:
			return x;
		case eIndirectAbsolute:
		  return (address)GetMemory(x) + ((address)GetMemory(x+1) << 8);
		case eAbsoluteIndexedX:
			return x + X;
		case eAbsoluteIndexedY:
			return x + Y;
		case eZeroPage:
			return x & 0x00FF;
		case eZeroPageIndexedX:
			return ((x + X) & 0x00FF);
		case eZeroPageIndexedY:
			return ((x + Y) & 0x00FF);
		case eIndexedIndirect:
		  return ((address)(GetMemory(x+X+1))<<8) + (address)(GetMemory(x+X));
		case eIndirectIndexed:
		  return ((address)(GetMemory(x+1))<<8) + (address)(GetMemory(x)) + Y;
	}
}

int fAddressGetLength(Addressing mode){
	switch(mode){
		case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY:
			return 3;
		case eAccumulator: case eImplied:
			return 1;
		default:
			return 2;
	}
}

byte fAddressGetValue(Addressing mode, address x, address addr) {
	switch(mode){
		case eImplied:
			return 0;
		case eRelative:
		case eImmediate:
			return x;
		case eAccumulator:
			return acc;
		default:
			return GetMemory(addr);
	}
}

int fAddressGetCycles(Addressing mode, address x, address addr) {
	int cycles;

	//case &fADC: case &fAND: case &fBIT: case &fCMP: case &fCPX: case &fCPY:	case &fEOR:	case &fLDA:
	//case &fLDX: case &fLDY: case &fORA: case &fSBC: case &fSTX: case &fSTY:

	if (	current_instruction ==  &fADC || current_instruction ==  &fAND || current_instruction == &fBIT || current_instruction ==  &fCMP || current_instruction ==  &fCPX
		||	current_instruction ==  &fCPY || current_instruction ==  &fEOR || current_instruction == &fLDA || current_instruction ==  &fLDX || current_instruction ==  &fLDY
		||	current_instruction ==  &fORA || current_instruction ==  &fSBC || current_instruction == &fSTX || current_instruction ==  &fSTY	){
		switch(mode){
			case eImmediate:
				cycles = 2; break;
			case eZeroPage:
				cycles = 3; break;
			case eZeroPageIndexedX: case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY:
				cycles = 4; break;
			case eIndexedIndirect:
				cycles = 6; break;
			case eIndirectIndexed:
				cycles = 5; break;
		}
	}

	//case &fASL: case &fDEC: case &fINC: case &fLSR: case &fROL: case &fROR:
	else if(	current_instruction ==  &fASL || current_instruction ==  &fDEC || current_instruction == &fINC
			||	current_instruction ==  &fLSR || current_instruction ==  &fROL || current_instruction == &fROR	){
		switch(mode){
			case eAccumulator:
				cycles = 2; break;
			case eZeroPage:
				cycles = 5; break;
			case eZeroPageIndexedX: case eAbsolute:
				cycles = 6; break;
			case eAbsoluteIndexedX:
				cycles = 7; break;
		}
	}

	//case &fSTA:
	else if  (current_instruction == &fSTA){
		switch(mode){
			case eZeroPage:
				cycles = 3; break;
			case eZeroPageIndexedX: case eAbsolute:
				cycles = 4; break;
			case eAbsoluteIndexedX: case eAbsoluteIndexedY:
				cycles = 5; break;
			case eIndexedIndirect: case eIndirectIndexed:
				cycles = 6; break;
		}
	}


	//case &fBRK:
	else if (current_instruction == &fBRK){
		cycles = 7;
	}


	//case &fRTI: case &fRTS: case &fJSR:
	else if (current_instruction == &fRTI || current_instruction == &fRTS || current_instruction == &fJSR){
		cycles = 6;
	}

	//case &fJMP:
	else if (current_instruction == &fJMP){
		cycles = 5;
	}

	//case &fPLA: case &fPLP:
	else if (current_instruction == &fPLA || current_instruction == &fPLP){
		cycles = 4;
	}

	//case &fPHA: case &fPHP:
	else if (current_instruction == &fPHA || current_instruction == &fPHP){
		cycles = 3;
	}

	else {
		cycles = 2;
	}


	// Page Boundary

	//case &fADC: case &fSBC: case &fLDA: case &fLDX: case &fLDY: case &fEOR: case &fAND: case &fORA: case &fCMP:
	if (	current_instruction ==  &fADC || current_instruction ==  &fSBC || current_instruction == &fLDA || current_instruction ==  &fLDX || current_instruction ==  &fLDY
		||	current_instruction ==  &fEOR || current_instruction ==  &fAND || current_instruction == &fORA || current_instruction ==  &fCMP ){
		switch(mode){
			case eAbsoluteIndexedX: 
				if ((x & 0xFF00) != ((x + X) & 0xFF00))
					cycles++;
				break;
			case eAbsoluteIndexedY: 
				if ((x & 0xFF00) != ((x + Y) & 0xFF00))
					cycles++;
				break;
			case eIndirectIndexed:
				if ((addr & 0xFF00) != (addr - Y & 0xFF00))
					cycles++;
				break;
		}
	}

	return cycles;
}

AddData fAddress(Addressing mode, address x) {
	AddData ret;
	ret.add    = fAddressGetAddress (mode, x);
	ret.value  = fAddressGetValue   (mode, x, ret.add);
	ret.length = fAddressGetLength  (mode);
	ret.cycles = fAddressGetCycles  (mode, x, ret.add);
	return ret;
}