summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authoralekseiplusplus <alekseijeaves@protonmail.com>2023-12-07 04:39:33 +1100
committeralekseiplusplus <alekseijeaves@protonmail.com>2023-12-07 04:39:33 +1100
commit68cdad3be01539e583627e1c8929f182255541be (patch)
tree15349096a94ac9b3383f1d6af2266f2024ef107b /src/cpu
parent98dd41e2ce7dedb81ab91342eed29da017006ea4 (diff)
small changes
Diffstat (limited to 'src/cpu')
l---------src/cpu/.#addressing.c1
-rw-r--r--src/cpu/addressing.c12
-rw-r--r--src/cpu/core.h2
-rw-r--r--src/cpu/instructions.c114
-rw-r--r--src/cpu/instructions.h112
-rw-r--r--src/cpu/table.c6
6 files changed, 124 insertions, 123 deletions
diff --git a/src/cpu/.#addressing.c b/src/cpu/.#addressing.c
deleted file mode 120000
index e0e3e02..0000000
--- a/src/cpu/.#addressing.c
+++ /dev/null
@@ -1 +0,0 @@
-aleksei@arch-desktop.664:1701869620 \ No newline at end of file
diff --git a/src/cpu/addressing.c b/src/cpu/addressing.c
index 60ec4f0..903e5d0 100644
--- a/src/cpu/addressing.c
+++ b/src/cpu/addressing.c
@@ -5,7 +5,7 @@
#include"addressing.h"
-//Holds address of current instruction.
+//Holds address of current instruction. I don't think it's being used at all besides fAddressGetCycles(), so will be removed.
void* current_instruction;
address fAddressGetAddress(Addressing mode, address x) {
@@ -30,15 +30,15 @@ address fAddressGetAddress(Addressing mode, address x) {
case eZeroPageIndexedY:
return ((x + Y) & 0x00FF);
case eIndexedIndirect:
- return ((address)(GetMemory(x+X+1))<<8) + (address)(GetMemory(x+X));
+ return (((address)(GetMemory(x+X+1)))<<8) + (address)(GetMemory(x+X));
case eIndirectIndexed:
- return ((address)(GetMemory(x+1))<<8) + (address)(GetMemory(x)) + Y;
+ return ((address)(GetMemory(x+1))<<8) + (address)(GetMemory(x)) + Y;
}
}
int fAddressGetLength(Addressing mode){
switch(mode){
- case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY:
+ case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: case eIndirectAbsolute:
return 3;
case eAccumulator: case eImplied:
return 1;
@@ -61,6 +61,8 @@ byte fAddressGetValue(Addressing mode, address x, address addr) {
}
}
+// At the moment not run, and will probably be replaced by just direct storage of values.
+// The code making up this is likely way less performant and larger than just looking up stored values, so I will change it in the future to do that instead.
int fAddressGetCycles(Addressing mode, address x, address addr) {
int cycles;
@@ -174,6 +176,6 @@ AddData fAddress(Addressing mode, address x) {
ret.add = fAddressGetAddress (mode, x);
ret.value = fAddressGetValue (mode, x, ret.add);
ret.length = fAddressGetLength (mode);
- ret.cycles = fAddressGetCycles (mode, x, ret.add);
+ //ret.cycles = fAddressGetCycles (mode, x, ret.add);
return ret;
}
diff --git a/src/cpu/core.h b/src/cpu/core.h
index 4545cd5..7c0f284 100644
--- a/src/cpu/core.h
+++ b/src/cpu/core.h
@@ -58,4 +58,4 @@ void SetMemory(address x, byte y);
extern void *current_instruction;
extern AddData idata;
-extern void (*func)(Addressing, address);
+extern void (*func)(Addressing);
diff --git a/src/cpu/instructions.c b/src/cpu/instructions.c
index 1a94386..abe6365 100644
--- a/src/cpu/instructions.c
+++ b/src/cpu/instructions.c
@@ -16,39 +16,39 @@ AddData idata;
// Load and Store Instructions
-void fLDA(Addressing addr, address val){
+void fLDA(Addressing addr){
acc = idata.value;
SetFlagN(acc);
SetFlagZ(acc);
}
-void fLDX(Addressing addr, address val){
+void fLDX(Addressing addr){
X = idata.value;
SetFlagN(X);
SetFlagZ(X);
}
-void fLDY(Addressing addr, address val){
+void fLDY(Addressing addr){
Y = idata.value;
SetFlagN(Y);
SetFlagZ(Y);
}
-void fSTA(Addressing addr, address val){
+void fSTA(Addressing addr){
SetMemory(idata.add, acc);
}
-void fSTX(Addressing addr, address val){
+void fSTX(Addressing addr){
SetMemory(idata.add, X);
}
-void fSTY(Addressing addr, address val){
+void fSTY(Addressing addr){
SetMemory(idata.add, Y);
}
// Arithmetic Instructions
-void fADC(Addressing addr, address val){
+void fADC(Addressing addr){
byte buffer = acc + idata.value + getFlag(flag_C);
SetFlagV(buffer, acc);
@@ -60,7 +60,7 @@ void fADC(Addressing addr, address val){
SetFlagZ(acc);
}
-void fSBC(Addressing addr, address val){
+void fSBC(Addressing addr){
byte buffer = acc - idata.value - !getFlag(flag_C);
SetFlagV(buffer, acc);
@@ -75,39 +75,39 @@ void fSBC(Addressing addr, address val){
//Increment and Decrement Instructions
-void fINC(Addressing addr, address val){
+void fINC(Addressing addr){
byte a = idata.value;
SetMemory(idata.add, ++a);
SetFlagN(a);
SetFlagZ(a);
}
-void fINX(Addressing addr, address val){
+void fINX(Addressing addr){
X++;
SetFlagN(X);
SetFlagZ(X);
}
-void fINY(Addressing addr, address val){
+void fINY(Addressing addr){
Y++;
SetFlagN(Y);
SetFlagZ(Y);
}
-void fDEC(Addressing addr, address val){
+void fDEC(Addressing addr){
byte a = idata.value;
SetMemory(idata.add, --a);
SetFlagN(a);
SetFlagZ(a);
}
-void fDEX(Addressing addr, address val){
+void fDEX(Addressing addr){
X--;
SetFlagN(X);
SetFlagZ(X);
}
-void fDEY(Addressing addr, address val){
+void fDEY(Addressing addr){
Y--;
SetFlagN(Y);
SetFlagZ(Y);
@@ -115,19 +115,19 @@ void fDEY(Addressing addr, address val){
// Logical Instructions
-void fAND(Addressing addr, address val){
+void fAND(Addressing addr){
acc &= idata.value;
SetFlagN(acc);
SetFlagZ(acc);
}
-void fORA(Addressing addr, address val){
+void fORA(Addressing addr){
acc |= idata.value;
SetFlagN(acc);
SetFlagZ(acc);
}
-void fEOR(Addressing addr, address val){
+void fEOR(Addressing addr){
acc ^= idata.value;
SetFlagN(acc);
SetFlagZ(acc);
@@ -135,61 +135,61 @@ void fEOR(Addressing addr, address val){
// Jump, Branch, Compare, and Test Bits
-void fJMP(Addressing addr, address val){
- PC = idata.value - idata.length;
+void fJMP(Addressing addr){
+ PC = idata.add - idata.length;
}
-void fBCC(Addressing addr, address val){
+void fBCC(Addressing addr){
if (getFlag(flag_C) == 0) PC += (char)idata.value;
}
-void fBCS(Addressing addr, address val){
+void fBCS(Addressing addr){
if (getFlag(flag_C) == 1) PC += (char)idata.value;
}
-void fBEQ(Addressing addr, address val){
+void fBEQ(Addressing addr){
if (getFlag(flag_Z) == 1) PC += (char)idata.value;
}
-void fBNE(Addressing addr, address val){
+void fBNE(Addressing addr){
if (getFlag(flag_Z) == 0) PC += (char)idata.value;
}
-void fBMI(Addressing addr, address val){
+void fBMI(Addressing addr){
if (getFlag(flag_N) == 1) PC += (char)idata.value;
}
-void fBPL(Addressing addr, address val){
+void fBPL(Addressing addr){
if (getFlag(flag_N) == 0) PC += (char)idata.value;
}
-void fBVS(Addressing addr, address val){
+void fBVS(Addressing addr){
if (getFlag(flag_V) == 1) PC += (char)idata.value;
}
-void fBVC(Addressing addr, address val){
+void fBVC(Addressing addr){
if (getFlag(flag_V) == 0) PC += (char)idata.value;
}
-void fCMP(Addressing addr, address val){
+void fCMP(Addressing addr){
SetFlag(flag_C, (acc >= idata.value) ? 1 : 0);
SetFlag(flag_Z, (acc == idata.value) ? 1 : 0);
SetFlag(flag_N, (acc < idata.value) ? 1 : 0);
}
-void fCPX(Addressing addr, address val){
+void fCPX(Addressing addr){
SetFlag(flag_C, (X >= idata.value) ? 1 : 0);
SetFlag(flag_Z, (X == idata.value) ? 1 : 0);
SetFlag(flag_N, (X < idata.value) ? 1 : 0);
}
-void fCPY(Addressing addr, address val){
+void fCPY(Addressing addr){
SetFlag(flag_C, (Y >= idata.value) ? 1 : 0);
SetFlag(flag_Z, (Y == idata.value) ? 1 : 0);
SetFlag(flag_N, (Y < idata.value) ? 1 : 0);
}
-void fBIT(Addressing addr, address val){
+void fBIT(Addressing addr){
SetFlag(flag_N, ((idata.value & flag_N) != 0) ? 1 : 0);
SetFlag(flag_V, ((idata.value & flag_V) != 0) ? 1 : 0);
SetFlag(flag_Z, ((idata.value & acc) == 0) ? 1 : 0);
@@ -197,7 +197,7 @@ void fBIT(Addressing addr, address val){
// Shift and Rotate Instructions
-void fASL(Addressing addr, address val){
+void fASL(Addressing addr){
if (addr == eAccumulator) {
SetFlag(flag_C, (acc & 0x80));
acc = (idata.value << 1) & 0xFE;
@@ -213,7 +213,7 @@ void fASL(Addressing addr, address val){
}
}
-void fLSR(Addressing addr, address val){
+void fLSR(Addressing addr){
if (addr == eAccumulator) {
SetFlag(flag_C, (acc & 0x01));
acc = (idata.value >> 1) & 0x7F;
@@ -229,7 +229,7 @@ void fLSR(Addressing addr, address val){
}
}
-void fROL(Addressing addr, address val){
+void fROL(Addressing addr){
if (addr == eAccumulator) {
SetFlag(flag_C, (idata.value & 0x80));
acc = (idata.value << 1) & 0xFE;
@@ -248,7 +248,7 @@ void fROL(Addressing addr, address val){
}
}
-void fROR(Addressing addr, address val){
+void fROR(Addressing addr){
if (addr == eAccumulator) {
SetFlag(flag_C, (idata.value & 0x01));
acc = (idata.value >> 1) & 0x7F;
@@ -269,25 +269,25 @@ void fROR(Addressing addr, address val){
// Transfer Instructions
-void fTAX(Addressing addr, address val){
+void fTAX(Addressing addr){
X = acc;
SetFlagN(X);
SetFlagZ(X);
}
-void fTAY(Addressing addr, address val){
+void fTAY(Addressing addr){
Y = acc;
SetFlagN(Y);
SetFlagZ(Y);
}
-void fTXA(Addressing addr, address val){
+void fTXA(Addressing addr){
acc = X;
SetFlagN(acc);
SetFlagZ(acc);
}
-void fTYA(Addressing addr, address val){
+void fTYA(Addressing addr){
acc = Y;
SetFlagN(acc);
SetFlagZ(acc);
@@ -295,46 +295,46 @@ void fTYA(Addressing addr, address val){
// Stack Instructions
-void fTSX(Addressing addr, address val){
+void fTSX(Addressing addr){
X = S;
}
-void fTXS(Addressing addr, address val){
+void fTXS(Addressing addr){
S = X;
}
-void fPHA(Addressing addr, address val){
+void fPHA(Addressing addr){
SetStack(acc);
}
-void fPHP(Addressing addr, address val){
+void fPHP(Addressing addr){
SetStack(P);
}
-void fPLA(Addressing addr, address val){
+void fPLA(Addressing addr){
acc = GetStack();
}
-void fPLP(Addressing addr, address val){
+void fPLP(Addressing addr){
P = GetStack();
}
// Subroutine Instructions
-void fJSR(Addressing addr, address val){
+void fJSR(Addressing addr){
SetStack ((PC+idata.length) >> 8);
SetStack(((PC+idata.length) & 0x00FF) - 1);
PC = idata.add;
PC -= idata.length;
}
-void fRTS(Addressing addr, address val){
+void fRTS(Addressing addr){
PC = (address)(GetStack()) + 1;
PC += ((address)(GetStack())) << 8;
PC -= idata.length;
}
-void fRTI(Addressing addr, address val){
+void fRTI(Addressing addr){
P = GetStack(); //NEED TO FIX
PC = (address)(GetStack());
PC += (address)(GetStack() << 8);
@@ -342,40 +342,40 @@ void fRTI(Addressing addr, address val){
// Set/Reset Insutrctions
-void fCLC(Addressing addr, address val){
+void fCLC(Addressing addr){
SetFlag(flag_C, 0);
}
-void fCLD(Addressing addr, address val){
+void fCLD(Addressing addr){
SetFlag(flag_D, 0);
}
-void fCLI(Addressing addr, address val){
+void fCLI(Addressing addr){
SetFlag(flag_I, 0);
}
-void fCLV(Addressing addr, address val){
+void fCLV(Addressing addr){
SetFlag(flag_V, 0);
}
-void fSEC(Addressing addr, address val){
+void fSEC(Addressing addr){
SetFlag(flag_C, 1);
}
-void fSED(Addressing addr, address val){
+void fSED(Addressing addr){
SetFlag(flag_D, 1);
}
-void fSEI(Addressing addr, address val){
+void fSEI(Addressing addr){
SetFlag(flag_I, 1);
}
// NOP/BRK Instructions
-void fNOP(Addressing addr, address val){
+void fNOP(Addressing addr){
}
-void fBRK(Addressing addr, address val){
+void fBRK(Addressing addr){
SetStack((((PC+2) & 0xFF00) >> 8));
SetStack((PC+2) & 0x00FF);
SetStack(P);
diff --git a/src/cpu/instructions.h b/src/cpu/instructions.h
index 1725d28..705cc0d 100644
--- a/src/cpu/instructions.h
+++ b/src/cpu/instructions.h
@@ -5,79 +5,79 @@
#include"6502.h"
// Load and Store Instructions
-void fLDA(Addressing, address);
-void fLDX(Addressing, address);
-void fLDY(Addressing, address);
-void fSTA(Addressing, address);
-void fSTX(Addressing, address);
-void fSTY(Addressing, address);
+void fLDA(Addressing);
+void fLDX(Addressing);
+void fLDY(Addressing);
+void fSTA(Addressing);
+void fSTX(Addressing);
+void fSTY(Addressing);
// Arithmetic Instructions
-void fADC(Addressing, address);
-void fSBC(Addressing, address);
+void fADC(Addressing);
+void fSBC(Addressing);
//Increment and Decrement Instructions
-void fINC(Addressing, address);
-void fINX(Addressing, address);
-void fINY(Addressing, address);
-void fDEC(Addressing, address);
-void fDEX(Addressing, address);
-void fDEY(Addressing, address);
+void fINC(Addressing);
+void fINX(Addressing);
+void fINY(Addressing);
+void fDEC(Addressing);
+void fDEX(Addressing);
+void fDEY(Addressing);
// Logical Instructions
-void fAND(Addressing, address);
-void fORA(Addressing, address);
-void fEOR(Addressing, address);
+void fAND(Addressing);
+void fORA(Addressing);
+void fEOR(Addressing);
// Jump, Branch, Compare, and Test Bits
-void fJMP(Addressing, address);
-void fBCC(Addressing, address);
-void fBCS(Addressing, address);
-void fBEQ(Addressing, address);
-void fBNE(Addressing, address);
-void fBMI(Addressing, address);
-void fBPL(Addressing, address);
-void fBVS(Addressing, address);
-void fBVC(Addressing, address);
-void fCMP(Addressing, address);
-void fCPX(Addressing, address);
-void fCPY(Addressing, address);
-void fBIT(Addressing, address);
+void fJMP(Addressing);
+void fBCC(Addressing);
+void fBCS(Addressing);
+void fBEQ(Addressing);
+void fBNE(Addressing);
+void fBMI(Addressing);
+void fBPL(Addressing);
+void fBVS(Addressing);
+void fBVC(Addressing);
+void fCMP(Addressing);
+void fCPX(Addressing);
+void fCPY(Addressing);
+void fBIT(Addressing);
// Shift and Rotate Instructions
-void fASL(Addressing, address);
-void fLSR(Addressing, address);
-void fROL(Addressing, address);
-void fROR(Addressing, address);
+void fASL(Addressing);
+void fLSR(Addressing);
+void fROL(Addressing);
+void fROR(Addressing);
// Transfer Instructions
-void fTAX(Addressing, address);
-void fTAY(Addressing, address);
-void fTXA(Addressing, address);
-void fTYA(Addressing, address);
+void fTAX(Addressing);
+void fTAY(Addressing);
+void fTXA(Addressing);
+void fTYA(Addressing);
// Stack Instructions
-void fTSX(Addressing, address);
-void fTXS(Addressing, address);
-void fPHA(Addressing, address);
-void fPHP(Addressing, address);
-void fPLA(Addressing, address);
-void fPLP(Addressing, address);
+void fTSX(Addressing);
+void fTXS(Addressing);
+void fPHA(Addressing);
+void fPHP(Addressing);
+void fPLA(Addressing);
+void fPLP(Addressing);
// Subroutine Instructions
-void fJSR(Addressing, address);
-void fRTS(Addressing, address);
-void fRTI(Addressing, address);
+void fJSR(Addressing);
+void fRTS(Addressing);
+void fRTI(Addressing);
// Set/Reset Insutrctions
-void fCLC(Addressing, address);
-void fCLD(Addressing, address);
-void fCLI(Addressing, address);
-void fCLV(Addressing, address);
-void fSEC(Addressing, address);
-void fSED(Addressing, address);
-void fSEI(Addressing, address);
+void fCLC(Addressing);
+void fCLD(Addressing);
+void fCLI(Addressing);
+void fCLV(Addressing);
+void fSEC(Addressing);
+void fSED(Addressing);
+void fSEI(Addressing);
// NOP/BRK Instructions
-void fNOP(Addressing, address);
-void fBRK(Addressing, address); \ No newline at end of file
+void fNOP(Addressing);
+void fBRK(Addressing);
diff --git a/src/cpu/table.c b/src/cpu/table.c
index 4e60f58..052fce7 100644
--- a/src/cpu/table.c
+++ b/src/cpu/table.c
@@ -5,7 +5,7 @@
void* InstructionTable;
-void (*func)(Addressing, address);
+void (*func)(Addressing);
uintptr_t* GetInstructionTableFunction(int i){ //Segmentation fault is occurring here, likely in next one too
uintptr_t* r = (InstructionTable + (sizeof(uintptr_t)*i));
@@ -20,7 +20,7 @@ Addressing* GetInstructionTableAddressing(int i){
void CallInstructionTable(){
int val = 0;
// Setup to call the correct function.
- int i = (address)GetMemory(PC);
+ int i = (int)GetMemory(PC);
uintptr_t a = GetInstructionTableFunction(i);
memcpy(&func, a, sizeof(uintptr_t));
// Find the correct addressing mode.
@@ -36,7 +36,7 @@ void CallInstructionTable(){
idata = fAddress(r, val);
// Perform function
- func(r, val); // TODO: MARKER FOR 3/12/2023
+ func(r);
PC += idata.length;